ARM, Ceva aim at multi-carrier modems
ARM and Ceva have both aimed at the need for to juggle control code and DSP in the upcoming LTE-Advanced and 5G with their latest processor core architectures.
Author Archives: Chris Edwards
Cadence boosts compression with physical DFT tool
Cadence has use physically aware placement in a test tool that promises less routing congestion for scan test and which increases the potential for stimulus compression.
OpenAMP brings control to multicore SoCs
The Multicore Association has started work on standardizing a set of APIs that aim to simplify communications between processors in heterogeneous multicore SoCs
Qt tightens open-source licenses
The Qt Company has changed the licenses it supports on the open-source versions of its user-interface software framework, removing the LGPL2.1 version.
Prpl Foundation proposes security architecture
The Prpl Foundation has published a guide to techniques it claims will improve the security of embedded systems.
GaN power makes progress at IEDM 2015
Researchers describe at IEDM 2015 how they are making gallium nitride fit into a wider range of power-handling applications and may even result in mass-market vertical transistors.
IEDM keynote: cost scaling will swap architectural changes for area
According to ARM's Greg Yeric in his keynote at IEDM, even with cost improvements for multiple patterning, fewer designs will see the benefit of further silicon node scaling. Savings will come from design.
Cortus adds hardware floating point to low-area processor family
Cortus has added to its version 2 architecture a processor core that offers hardware support for floating-point code.
Cadence partners for photonic IC design
Cadence Design Systems has worked with Lumerical Solutions and PhoeniX Software to develop a flow for designing photonic ICs based on the Virtuoso custom-design platform.
Ultrasoc tweaks debug technology to act as SoC burglar alarm
Ultrasoc is adding security monitoring to its toolkit, providing SoC designers with a mechanism for their chips to warn of attempts by hackers to break into secure areas.