ADC design shifts gears for lower power
SAR analog-to-digital converters promise better energy efficiency for a growing range of designs, as S3 Group has found.
IP
Cadence to buy Forte and build out HLS offering
EDA giant cites high-level synthesis' move into the mainstream as driven by IP integration challenges in striking deal for the HLS market leader.
Rambus CEO calls for collaboration and an architectural focus for memory
Dr Ron Black also discussed his experiences with the Internet of Things in a lively keynote at the GSA Memory+ Conference in Taipei
Cadence launches IP cores for 60GHz wireless and consumer audio
Cadence Design Systems has launched IP cores for high-end mobile audio as well as gigasample ADCs for 28nm to support 60GHz wireless.
IP-XACT gets design-flow extensions
Accellera has vendor extensions for IP-XACT that allow tool-specific metadata to be added to support activities such as power-aware verification and floorplanning.
SoC design gets hierarchical test strategy, improved compression; system design gains end-to-end IJTAG integration strategy
Synopsys automates standards-based hierarchical test insertion and improves test compression for SoCs; Mentor teams with ScanWorks for system-wide IJTAG.
ARM buys securable display controller
ARM has agreed to buy from Cadence Design Systems the display controller IP cores developed by recent acquisition Evatronix.
IP providers make plans for the internet of things
ARM and Synopsys both plan to make inroads to the internet of things with their IP strategies.
ANALYSIS: nVidia has the IP to license but what about the ecosystem?
To get others to adopt its GPU cores, Nvidia must quickly build partnerships with tool vendors and foundries that guarantee easy implementation.
nVidia to license GPU technology as IP cores
Graphics chipmaker nVidia has said it plans to license as IP cores some of its technology in the hope of building up a customer base among other chipmakers and systems houses developing their own SoCs.