The USB Type-C connector is versatile and already gaining traction in laptops, tablets and desktops. Here's how verification IP plays an important role in achieving the best implementation.
The open NVMe standard is helping non-volatile memory storage reach its true potential with increasingly rich verification support
Flash is the ice cream of memory technologies - everybody loves it. But you need to build the right verification environment to extract the greatest benefit.
How to leverage a simpler, standardized approach to describing generic and reusable stimulus sequences for verification IP.
This article shows practical ways to use verification IP for greater productivity with specific code examples from Mentor Graphics' Questa platform.
Verification IP can help verify that memory-controller implementations meet standards; test an implementation against specific memories; and drive traffic for SoC verification and power analysis. Here's how to choose it.
Established physical layer verification IP packages focus so much on protocols they miss problems that arise from the broader context. A PHY verification kit bridges the gap.
The argument for an integrated approach to SoC verification
The growing verification challenge, and how to address it by coordinating multiple debug strategies.
Cache coherency implemented in hardware increases the verification effort. VIP-based strategies are described with particular reference to ARM protocols.
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