BEOL

April 24, 2020

How to gain a competitive edge with advanced DFT

Learn how the latest design for test innovations deliver efficiency and profitability across the design flow.
November 20, 2018
HDAP_FeaturedImage

Adding system-level, post-layout electrical analysis to HDAP design and verification

Adoption of high-density advanced packaging (HDAP) needs tools and supports to build designers' confidence in the emerging technology.
Article  |  Topics: EDA - IC Implementation, Verification  |  Tags: , , , , , ,   |  Organizations: , ,
September 14, 2017
Featured image - Silicon photonics

Silicon photonics moves out of the shadows

An alphabet soup of AI, HPC, 5G and the IoT has finally seeded creation of a design infrastructure for silicon photonics.
November 6, 2015

Reducing test costs through multisite and concurrent testing

How to save test time and test costs by doing more tests in parallel, increasing compression, pooling tester memory, managing branching - and more
Article  |  Topics: EDA - DFT  |  Tags: , ,   |  Organizations: ,
September 23, 2015

Mounting Fiji: How AMD realized the first volume interposer

AMD's Radeon R9 family is the result of eight years developing 3D-IC and interposer technology. What lessons did the company learn?
Article  |  Topics: EDA - DFM, DFT, IC Implementation  |  Tags: , , , , , , ,   |  Organizations: , , , ,

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