Archives

February 27, 2014

Freescale tweaks Cortex-M0+ MCU to squeeze die size down

Freescale Semiconductor has tuned the design of the KL02 microcontroller to produce a new design that is close to 20 per smaller.
Article  |  Topics: Blog - Embedded  |  Tags: , , ,   |  Organizations:
February 27, 2014

Filesystem streamlines flash usage for smart meters

HCC Embedded has developed a specialised filesystem for smart meters designed to reduce power consumption and increase flash memory lifetime.
February 26, 2014

Silicon Labs brings 8 and 32bit MCUs into toolchain

Silicon Labs has brought development support for both its 8bit and ongoing 32bit microcontroller lines together using its Simplicity Studio IDE.
Article  |  Topics: Blog - Embedded  |  Tags: , , , ,   |  Organizations: ,
February 26, 2014

Real Intent state machine debug focuses on core errors

Real Intent' Ascent IIV tool adds analysis functions to pinpoint fundamental errors in finite state machines and support for SystemVerilog 2009.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations:
February 25, 2014

IoT calls for security rethink, says Green Hills CTO

The rise of the Internet of Things will drive a change in attitude to security, Green Hills CTO David Kleidermacher claimed in his Embedded World keynote.
Article  |  Topics: Blog - Embedded  |  Tags: , ,   |  Organizations:
February 24, 2014

Cadence uses SQL to boost verification manager capacity

Cadence Design Systems has launched Incisive vManager, a verification management tool that uses a database backend to manage coverage on large SoC projects.
Article  |  Topics: Blog - EDA  |  Tags: , ,   |  Organizations:
February 24, 2014

MIPS brings virtualization and tamper protection to 32bit MCUs

Imagination Technologies' MIPS group has launched processor cores that include support for virtualization and measures to prevent reverse engineering.
February 21, 2014

DVCon sets up in Europe

Verification conference DVCon is expanding into Europe with a two-day conference and show at the Hilton in Munich, Germany.
Article  |  Topics: Blog - EDA  |  Tags: ,   |  Organizations:
February 7, 2014

Synopsys claims latest Design Compiler shrinks existing netlist area, leakage up to 10%

Uses improved logic optimisations and a new approach to meeting timing.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations:
February 6, 2014

Cadence to buy Forte and build out HLS offering

EDA giant cites high-level synthesis' move into the mainstream as driven by IP integration challenges in striking deal for the HLS market leader.