automotive

July 26, 2016

Cadence adds floating point to Fusion

Cadence Design Systems has added floating-point to its latest core intended for embedded signal processing.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , ,   |  Organizations:
June 6, 2016

NXP readies single package solution for 77GHz radar

NXP discusses second silicon flavor for automotive radar, after earlier launch of postage-stamp devices.
May 23, 2016

Mentor integrates automotive IGBT test and simulation

A new dedicated automotive power tester helps cut simulation errors to just 0.5% with more faithful calibration.
March 31, 2016

53rd DAC conference program announced

The 53rd Design Automation Conference has published its program for the upcoming event in Austin, Texas, which will include keynotes from AMD, nVidia, and NXP Semiconductors and tracks that connect electronics to biology.
Article  |  Topics: Blog - EDA, IP, PCB  |  Tags: , , , , ,   |  Organizations: , ,
March 15, 2016

X-Fab aims at lower-cost SiC with upgraded 6in line

X-Fab Silicon Foundries has upgraded its 6in fab in Lubbock, Texas to handle silicon carbide wafers in parallel with existing silicon production.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations:
December 4, 2015

Three key ways to reduce silicon test costs

Mentor's Greg Aldrich describes how test's market leader is driving down cost in the billion-gate era by rethinking and extending existing technologies
November 12, 2015

DVCon Europe: Getting TLM to cope with proliferating ECUs and serial protocols

High powered alliance develops TLM standards to address growing automotive and IoT concerns.
October 8, 2015

Expanding role of UVM takes center stage at DVCon Europe

Tech Design Forum talked to the general and program chairs of DVCon Europe about the conference and how it seeks to show the expansion of IC verification methodologies to the system level.
June 25, 2015

X-Fab updates 180nm SOI process for automotive and industrial applications

Foundry claims isolation and device integration advantages for 180nm SOI process, help to absorb extra costs of SOI wafers
Article  |  Topics: Blog - EDA, - Product  |  Tags: , , , , ,   |  Organizations:
June 8, 2015

Synopsys speeds automotive SoC qualification with IP launch

Synopsys develops portfolio of ASIL B ready IP, and invests in AEC-Q100 testing and TS 16949 quality management, to ease automotive SoC qualification.
Article  |  Topics: Blog - IP  |  Tags: , , , , , , ,   |  Organizations: , ,

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