Real Intent’s Meridian CDC flexes hierarchical muscle, adds flexible debug
Major overhaul of clock domain crossing suite adds configurable debugger, boosts performance by 30% and cuts memory 40% for ‘giga-scale’ designs.
Major overhaul of clock domain crossing suite adds configurable debugger, boosts performance by 30% and cuts memory 40% for ‘giga-scale’ designs.
Synopsys is integrating its verification tools to make it easier to move between verification approaches for software centric SoCs
TSMC has launched three processes the foundry is aiming at internet-of-things (IoT) and wearable-device designs, providing lower-leakage versions of its 55nm, 40nm and 28nm processes.
To make a high-efficiency power supply XP Power used heat as an additional design variable with an architecture that turns conventional wisdom over one aspect of component reliability on its head.
Xmos has designed a modular prototyping board for its XA devices, which combine the company’s own real-time, multithreaded processor core with an ARM Cortex-M3 microcontroller.
ARM’s latest core, the dual-issue M7 borrows features from the Cortex-R family for safety-critical applications as well as adding the option of cache memory.
Cisco has decided to buy memory-controller specialist Memoir Systems and absorb the technology into its Insieme business unit, which specializes in data-center switch technologies, a move that underlines the issues facing small IP suppliers and their customers.
Chris Rowen, CTO of the IP group at Cadence Design Systems, expects the internet of things (IoT) to cause a split in approaches to SoC design, one of a set of predictions about the nascent market.
Silicon Labs has developed a new type of parametric search tool that focuses on the selection of clock generators and jitter attenuators, making it easier to match them and downstream devices to the SoCs being designed into a PCB.
Digia, the company that took on the cross-platform Qt toolkit from Nokia, has formed a subsidiary to focus on the software.