Web tool simplifies PCB-level clock-tree choices

By Chris Edwards |  No Comments  |  Posted: September 17, 2014
Topics/Categories: Blog - PCB  |  Tags: , , ,  | Organizations:

Silicon Labs has developed a new type of parametric search tool that focuses on the selection of clock generators and jitter attenuators, making it easier to match them and downstream devices to the SoCs being designed into a PCB.

The Clock Tree Expert, which focuses on Silicon Labs’ own products, is a web application that points to suitable device for a given selection of onboard clocks as well as the settings they will need to use.

James Wilson, product director for timing products at Silicon Labs, said: “We saw this dilemma that customers were facing. A lot of SoCs specify their clock requirements in terms of phase noise but the clocks themselves are specified more often in terms of jitter. The Clock Tree Expert converts from noise to jitter, making it easier to match our timing ICs to the design. It’s also about minimizing the total number of devices required: we can often replace two to three components with a single IC.

“I like to think of this as being a smart parametric search. As we roll out new timing products it will be updated to ensure it is able to recommend the latest technology,” Wilson added.

Much of the focus for the tool is on the new crop of designs for internet infrastructure equipment. Wilson said this type of selection tool was important to develop because timing ICs are now able to provide low-jitter timing references for high-speed 10/40/100G data applications. However, choosing the right combination of clocks, oscillators, jitter attenuators, and buffers can time consuming task if done entirely manually. A further complication from the perspective of design is that companies are using these programmable parts to suit a wide variety of line-card interfaces and programming them at the end of the manufacturing line because it reduces the amount of work-in-process stock that needs to be held by manufacturers.

Silicon Labs designed its latest generation of clock ICs and jitter attenuators to use on-chip non-volatile memory (NVM) to cope with that approach to manufacturing. “The NVM can be programmed twice and it can be done in-circuit to allow configurable products: it has its own charge pump to provide the necessary voltage so that it does not external programming support,” Wilson said.

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