A look at three techniques to verify the validity of signals moving between clock domains
Using equivalence checking to validate ECOs in ARM core subsystem development at STMicroelectronics
Designers will have to update development processes to achieve the rigorous safety certifications required in automotive, rail, avionics and similar markets
Emulation is now served by all three leading vendors and is a hot topic for discussion among engineers. The major verification conferences need to follow suit.
How tool parallelism, automatic partitioning, deep debug memories and time domain multiplexing eases FPGA prototyping of large ASIC and SoC designs
How Imagination Technologies used FPGA-based prototyping to develop its GPU IP and integrate it into a real world system
Early and accurate SoC power estimation is possible, says Broadcom, thanks to a technique that maps simulation results between gate and RTL representations
Compliance with aviation’s hardware design standard is seen as a ‘tough ask’, but EDA’s own evolution has made that process easier than you may think.
How ST Microelectronics uses Synopsys' VCS AMS, combining VCS functional verification and CustomSim, to verify one of its mixed-signal designs
Combining assertion-based verification techniques with emulation makes for easier debug, better coverage and greater functional efficiency.
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