Verification

May 11, 2015
Fast to slow CDC - featimg

Verifying clock domain crossings when using fast-to-slow clocks

A look at three techniques to verify the validity of signals moving between clock domains
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May 6, 2015
Formality featimg

Fixing late ECOs in ARM core subsystems at STMicroelectronics

Using equivalence checking to validate ECOs in ARM core subsystem development at STMicroelectronics
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May 6, 2015
Mike Bartley is CEO of TVS. He has over 25 years' experience of building and managing test and verification teams at STMicroelectronics, Infineon and Elixent/Panasonic. He has consulted on multiple verification projects for companies including ARM and Infineon.

Achieving safety and security in SoC development

Designers will have to update development processes to achieve the rigorous safety certifications required in automotive, rail, avionics and similar markets
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April 30, 2015
Dr Lauro Rizzatti is an independent verification consultant. You can contact him at lauro AT rizzatti DOT com

Putting emulation on the map

Emulation is now served by all three leading vendors and is a hot topic for discussion among engineers. The major verification conferences need to follow suit.
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April 27, 2015
Enabling FPGA prototyping of large ASIC and SoC designs - featimg

Enabling FPGA prototyping of large ASIC and SoC designs

How tool parallelism, automatic partitioning, deep debug memories and time domain multiplexing eases FPGA prototyping of large ASIC and SoC designs
April 20, 2015
Prototyping Imagination GPUs - featimg

Developing and integrating configurable GPU IP using FPGA-based prototyping

How Imagination Technologies used FPGA-based prototyping to develop its GPU IP and integrate it into a real world system
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April 3, 2015
Early and accurate power estimation - feat img

A better method for early and accurate power estimation

Early and accurate SoC power estimation is possible, says Broadcom, thanks to a technique that maps simulation results between gate and RTL representations
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February 25, 2015
Pranav Ashar

DO-254 without tears

Compliance with aviation’s hardware design standard is seen as a ‘tough ask’, but EDA’s own evolution has made that process easier than you may think.
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January 30, 2015
VCS AMS feat img

Mixed-signal verification of advanced SoCs using VCS AMS

How ST Microelectronics uses Synopsys' VCS AMS, combining VCS functional verification and CustomSim, to verify one of its mixed-signal designs
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January 20, 2015
Veloce2 emulator

Assertion-based emulation

Combining assertion-based verification techniques with emulation makes for easier debug, better coverage and greater functional efficiency.

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