October 8, 2015
Amos Herlekar, Synopsys

Preparing for low-power verification success: setting objectives and measuring outcomes

A look at what it takes to verify low-power SoC designs, including setting objectives and measuring outcomes in a UPF-driven verification strategy
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September 28, 2015
HAPS cables 150

FPGA-based prototyping 2: Understand the real cost

Part two of our series on FPGA-based prototyping looks at two critical factors to address before a project begins: budgeting and high-level implementation.
September 24, 2015
OneSpin HLS and formal verification

Linking high-level synthesis with formal verification

High-level synthesis provides a way to explore hardware architectures to come up with the most efficient implementation for a given situation. But it has taken time for verification techniques to catch up with the idea and ensure design and architecture match.
September 18, 2015
Featured image: PHY VIP Sep 15

How PHY verification kits overcome traditional VIP limitations

Established physical layer verification IP packages focus so much on protocols they miss problems that arise from the broader context. A PHY verification kit bridges the gap.
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September 14, 2015
Simics - continuous integration prototype

Maximizing the benefits of continuous integration with simulation

Embedded systems developers are turning to agile techniques and continuous integration. To make these processes possible, you need an environment that supports easy access to virtual prototypes throughout the life cycle.
September 12, 2015
Dr Lauro Rizzatti, verification consultant

Skeet shooting and design debug

In-circuit emulation is attractive but brings with it debug-visibility issues. There are ways to restructure the environment to make bug hunting much more deterministic.
September 7, 2015
HAPS cables 150

FPGA-based prototyping 1: What’s all this buzz about?

This multi-part series addresses various aspects of FPGA-based prototyping. Future installments will address budgeting and implementation, but we start by looking at why the technique is generating so much interest.
August 21, 2015
Visual: cars speeding along a road

Why emulation performance doesn’t matter (on its own)

Emulation performance is a key metric in verification. But it is far from being the only consideration. How long it takes to get a design onto a verification platform and aspects such as debug are as important. These factors will control how verification platforms are deployed during a project's life cycle.
August 19, 2015
Jai Durgam, Synopsys

Make vs buy in automotive IP

A look at some of the quality and safety requirements that must be met when developing and applying semiconductor IP to the automotive sector.
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August 7, 2015
Automotive crash test

Improving functional safety of automotive systems using virtual prototyping

The increasing complexity of automative software is challenging the ability of established software testing strategies to demonstrate its functional safety. Here's how virtual prototyping can help.
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