How to achieve efficient merging of data from formats such as OASIS, GDS, and OpenAccess to ensure timely verification through DRC runs.
UPF provides a useful way to describe the power-management strategies that should be applied to a design, but using it introduces a number of challenges during low-power debugging.
Virtual sequences are considered challenging to write and re-use. Learn how to overcome those issues with the new Portable Stimulus Standard in this DMA-based case study.
Escape formal's narrower definitions with a flow that shows you how to Avoid, Detect, Erase, Prove Absence and Tape Out while avoiding bugs.
How formal verification for the ISO26262 automotive functional safety delivers the full activation, propagation, and observation in the form of proven and exhaustive results.
The verification challenges of using low-power design techniques to enable advanced power-management strategies in complex SoCs.
Adoption of high-density advanced packaging (HDAP) needs tools and supports to build designers' confidence in the emerging technology.
How the digital twin can fuel automotive verification flows impossible in the real world.
How you can use the dedicated rule decks now being provided by foundries as the foundation for a reliability verification flow.
Innovative methodologies, strategies and tool features help overcome other inefficiencies in complex but necessary simulations.
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