October 15, 2014
A look at a tool and a flow that makes it easier to put designs on to a HAPS physical prototyping system for verification, debug and software development purposes
May 24, 2014
ProtoCompiler understands HAPS FPGA prototyping hardware, so it can optimize logic placement and partitioning, even on designs with up to 250m ASIC gates.
January 27, 2014
Find how to spot some of the most common false clock-domain crossing (CDC) violations and how to efficiently find actual CDC problems that could kill a design if not corrected.
December 8, 2013
The second part of our series illustrates VP tools and techniques using the familiar example of Linux bring-up on an ARM-based SoC.
September 10, 2013
The first in a series of articles about using virtual prototyping techniques to achieve more effective debug.
April 30, 2013
SoC integration can be accelerated by using virtualization to make the benefits of emulation more accessible to both hardware and software engineers.
April 4, 2013
Debug of logic and testbench debug makes up 35% of chip design, and is growing as power-management and hardware/software issues become part of the task.
November 27, 2012
The Linux Trace Tookit next generation provides open source tracer technology that helps surmount debug and optimization challenges
April 5, 2012
Building a prototype SoC in one or a set of FPGAs can aid field trials, software development and hardware/software integration. But it's not easy, so the decision to go ahead needs careful consideration.
March 19, 2012
Root-cause analysis of detected errors is a key design step. Debugging can take more than half of the verification effort. Vennsa’s OnPoint automated debug technology has been integrated with Springsoft’s Verdi visualization platform to reduce cost and uncertainty.