September 12, 2015
In-circuit emulation is attractive but brings with it debug-visibility issues. There are ways to restructure the environment to make bug hunting much more deterministic.
March 17, 2014
Verification of hardware and software has become a key bottleneck for chip design. Hardware-assisted verification is removing that bottleneck.
December 16, 2013
Consistency is vital to IP integration strategies that rely on developing an SoC using a hierarchy of FPGA-based prototypes.
July 5, 2012
Using a new design-partitioning tool and stacked-silicon interconnect FPGA to develop an ASIC prototyping platform that can be reprogrammed several times a day.
April 25, 2012
Can emulation save energy and space, as well as time, during the verification process? Some argue so.
April 24, 2012
This extract from the Synopsys and Xilinx-authored "FPGA-Based Prototyping Methodology Manual" outlines a number of valuable strategies supported by brief project case studies.
April 5, 2012
Building a prototype SoC in one or a set of FPGAs can aid field trials, software development and hardware/software integration. But it's not easy, so the decision to go ahead needs careful consideration.