Accelerating ‘time to prototype’ with ProtoCompiler
A look at a tool and a flow that makes it easier to put designs on to a HAPS physical prototyping system for verification, debug and software development purposes
EDA Topics
Finding and fixing faults in finFET memories
FInFET memories have different defects than those based on planar transistors. Here's how to test and repair them.
ARM, TSMC design explores 16nm finFET issues
ARM and TSMC used an extensive pre-planning process, including a static analysis of each module's overall logic structure, to put together a 2.3GHz processor design based around ARM's main 64bit Big.Little pairing for the foundry's 16nm finFET process.
The evolution of lint
Lint is no longer just about checking RTL code. It already incorporates functional verification within a three-stage analysis. Time to look again at a 'familiar' technology.
Using optimized design flows to meet PPA goals for SoC processor cores
How tuning a design flow can help optimize SoC processor cores for power, performance and area - and make it possible to do different optimisations for different cores on the same SoC.
If we’d only known then what we know now
Innovation in physical verification is driven by incoming nodes but new tools and features can and should be fed back up the technology chain.
Design enablement and entitlement for 14/16nm finFET processes
How EDA tools are evolving to make it possible to design with finFET processes.
Exploiting Verific tools and features at the right abstraction level
EDA vendors and internal CAD teams use Verific parsers for tool development. Here's how one company developed its strategy for this popular technology.
Six key criteria for deciding to migrate to a finFET process
Moving to a finFET process means considering process readiness, cost and yield, as well as the traditional power, performance and area advantages
Hybrid emulation for development, validation and verification
This article introduces hybrid emulation, a combination of emulation and virtual prototypes, and its application to tasks such as architecture validation, early software development and software-driven verification.