AI

September 7, 2022

NVMe-oF – The future of cloud storage

NVMe over Fabrics (NVMe-oF) extends the memory standard for burgeoning data traffic and the demands of AI and machine learning.
November 4, 2021
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How UPMEM ensured effective power delivery for its processor-in-memory design

PIM memory boosts efficiency by operating on data without moving it to the CPU but realizing this type of novel technology posed power integration and planning challenges.
March 2, 2021
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Streaming Scan Network technology delivers ‘no compromise’ DFT for AI designs

A new technique is especially efficient for AI chips with modular, tiled design strategies leveraging multiple instantiations of the same cores.
September 13, 2019
John Blyler is a Consulting Editor of Tech Design Forum and the Editor-in-Chief of Interference Technology. He spent the first half of his career as a hardware-system systems engineer and program managerand the second half as a technology journalist, science writer and educator. John is an affiliate professor of systems engineering at Portland State University and lecturer for UC-Irvine’s online IoT program.

AI firsts (and more) at America’s SEMICON

SEMICON West showed a distinct thematic shift away from preserving Moore's Law to assessing the architectural implications of AI, as EDA was brought into the event.
April 2, 2019

High-level synthesis for AI: Part Two

How Chips&Media used HLS on the development of a computer vision IP block.
March 26, 2019

High-level synthesis for AI: Part One

The computational and algorithmic demands made by computer vision systems highlight HLS' value for AI system development.
January 28, 2019

Emulation for AI: Part Two

The second part of this feature looks at how Wave Computing's objectives with its dataflow processing unit for AI mapped to the use of emulation in its development.
January 25, 2019

Emulation for AI: Part One

An increasing number of AI players are building their own silicon and finding that emulation is key to overcoming the major challenges.
May 4, 2018
Dr Lauro Rizzatti is a verification consultant and industry expert on hardware emulation.

Cutting through the AI hype with OneSpin’s Raik Brinkmann

Lauro Rizzatti gets a reality check on AI for both design tools and designs themselves from the formal verification specialist.
Expert Insight  |  Topics: EDA - Verification  |  Tags: , , , ,   |  Organizations:
April 23, 2018

How eFPGAs will help build the brave new world of AI

Artificial intelligence and machine learning require the performance and flexibility offered by embedded FPGA (eFPGA) technology.

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