March 15, 2017
DVCon China general chair Andy Liu discusses Accellera’s new addition to its design and verification conference series (简体中文).
March 15, 2017
DVCon中国大会主席刘红亮讨论了Accellera新增的DVCon中国ASIC设计和验证会议的看点。
February 23, 2017
Portable stimulus and formal verification provide the means to handle the challenge of verifying cache-coherent SoC interconnects.
February 8, 2017
SSD controllers are becoming increasingly complex and as a result emulation is now the first choice for SSD verification. But your strategy must still meet five key criteria.
January 27, 2017
Richard Pugh looks at how innovations highlighted during the recent International Memory Workshop are driving the solid state drive (SSD) market.
January 19, 2017
The USB Type-C connector is versatile and already gaining traction in laptops, tablets and desktops. Here's how verification IP plays an important role in achieving the best implementation.
January 10, 2017
How a new software-led flow speeds silicon bring-up within the Tessent environment, including a Cypress Semiconductor case study.
December 29, 2016
Reliability is growing to match security as a key challenge for PCB design. These tools and techniques will help you rise to it.
December 20, 2016
The open NVMe standard is helping non-volatile memory storage reach its true potential with increasingly rich verification support
December 9, 2016
Traditional techniques are being challenged by shortening design cycles and the effects of later process nodes.