portable stimulus

How the use of declarative, constraint-based descriptions can help you focus command sequences on areas of interest.

How can we refine our approach functional verification to deal with the increasing number of systems that leverage artificial intelligence.

The vision of portable stimulus is to find a way to write tests that can be portable ‘vertically’ from IP block to subsystem to system, and ‘horizontally’ from simulation to emulation to silicon. However, applying portable stimulus to real chip designs is not trivial.

Accellera's Portable Test and Stimulus standard provides powerful features for verification that is not meant to replace UVM but augment existing verification flows. Here is how portable stimulus and UVM interact.

The Portable Stimulus Standard helps overcome many of the verification challenges inherent in the strict requirements of ISO 26262.

Portable Stimulus allows reuse along horizontal, vertical and technique axes, but you need to be aware of the strengths and weaknesses of each to get the greatest benefits.

Virtual sequences are considered challenging to write and re-use. Learn how to overcome those issues with the new Portable Stimulus Standard in this DMA-based case study.

This introduction to the new Accellera standard includes a demo of portable stimulus in use to fully verify a DMA engine.

Accellera's Portable Stimulus standard aims to improve verification efficiency and the reuse of test IP across the entire design life cycle.

Portable stimulus and formal verification provide the means to handle the challenge of verifying cache-coherent SoC interconnects.