Mentor Graphics

We talk to Mentor's David Wiens about how the company is giving the board-to-factory design flow a needed upgrade.

How to tune your scan pattern creation and application to cost-effectively match your test objectives.

How virtualization and integration with hardware testers are enabling networking SoCs in the billion-gate era.

Mentor's chairman and CEO has dug into why chip sales forecasts often miss the target and suggests some tools for assessing the Internet of Things.

Multi-patterning, finFETs and more are forcing more detailed overhauls of P&R software at each process node. We dig into some of the key new issues and how they are being addressed.

Analysts say there is a $1B market on the horizon. We talk with Mentor's Jean-Marie Brunet about where such a number could come from.

Users now demand a smooth GUI experience. Making sure they get one requires harvesting and understanding key metrics.

Emulators have come a long way since their first introduction nearly three decades ago.

To verify large, complex designs and meet time-to-market, you must use both simulation and emulation.

By taking a pragmatic approach, the two technology giants have comfortably adopted high-level synthesis and verification - and have shared their experiences.