EDA

We look at how best to leverage both software debug tools and emulators, the limitations to traditional techniques, and the drive toward offline debug.

The ISO 26262 safety standard lays out a number of best practices for the automotive industry and for suppliers. Formal verification provides a way of streamlining the verification of SoCs that need to conform to the standard.

The argument for an integrated approach to SoC verification

Will Ethernet become the dominant interconnect for automotive applications? A look at the market trends and standards, and how to use Ethernet IP and virtual-prototyping solutions in automotive applications.

How Wall Street's vastly resourced IT teams already point the way to cheaper, faster and more efficient verification by putting goals not tools first.

Complexity and the increasing use of thermal analysis software by non-expert designers demands new approaches for chip and PCB implementations.

How to use PCIe in low-power SoCs by swapping the standard PCIe PHY for M-PCIe, defined by MIPI for mobile use

How to enhance an 'ideal' parastitic extraction strategy to create a full 3D assembly-level parasitic netlist for simulation and circuit analysis.

Is it worth trying to iron out all the bugs in an SoC before taping out, or should design teams anticipating a re-spin go to silicon earlier and use the chips that come back as verification accelerators?

A panel session at DAC 2014 focused on the problems of high-speed, board-level interconnect and the roles of codesign and power integrity in solving them.