Academic

August 27, 2020
total critical area feature - headline image

How to optimize test patterns based on critical area

The world of ATPG just changed with the introduction of a new way to create and choose the most effective test patterns.
Article  |  Topics: EDA - DFT  |  Tags: , , , ,   |  Organizations: ,
September 25, 2019
Tom Anderson is a technical marketing consultant working with multiple EDA vendors, including AMIQ EDA. His previous roles have included vice president of marketing at Breker Verification Systems, vice president of applications engineering at 0-In Design Automation, vice president of engineering at IP pioneer Virtual Chips, group director of product management at Cadence, and director of technical marketing at Synopsys. He holds a Master of Science degree in Computer Science and Electrical Engineering from M.I.T. and a Bachelor of Science degree in Computer Systems Engineering from the University of Massachusetts at Amherst.

Delivering on the advanced refactoring of design and verification code

An IDE is critical to top quality refactoring. Here are some tips and examples of how to achieve that.
Expert Insight  |  Topics: EDA - Verification  |  Tags: , , , , , , , , ,   |  Organizations: ,
September 19, 2019
Hossam Sarhan, Mentor, a Siemens business

Today’s analog/RF designs need interconnect inductance extraction

Parasitic extraction has to take more account of inductive effects as operating frequencies rise and feature sizes shrink in complex SoCs.
Expert Insight  |  Topics: Electrical Design, EDA - IC Implementation  |  Tags: ,   |  Organizations: ,
September 13, 2019
John Blyler is a Consulting Editor of Tech Design Forum and the Editor-in-Chief of Interference Technology. He spent the first half of his career as a hardware-system systems engineer and program managerand the second half as a technology journalist, science writer and educator. John is an affiliate professor of systems engineering at Portland State University and lecturer for UC-Irvine’s online IoT program.

AI firsts (and more) at America’s SEMICON

SEMICON West showed a distinct thematic shift away from preserving Moore's Law to assessing the architectural implications of AI, as EDA was brought into the event.
September 11, 2018
Gandharv Bhatara is the product marketing manager for the Calibre OPC/RET products at Mentor, a Siemens Business.

EUV’s arrival demands a new resolution enhancement flow

Gandharv Bhatara looks at how the OPC and RET elements of Calibre are getting ready for the EUV age.
Expert Insight  |  Topics: EDA - DFM, - EDA Topics  |  Tags: , , , , , , ,   |  Organizations: , ,
April 17, 2018
Guido Groeseneken is an Imec fellow, researching advanced devices and the reliability physics of sub-10nm CMOS technologies.

Reliability research helps to create new technologies

Insights from research into reliability at Imec led to self-learning chips, security technologies, and finFET biosensors.
Expert Insight  |  Topics: EDA - DFM  |  Tags: , , , , ,   |  Organizations:
March 29, 2018
Two wafers fabbed at Imec

3DIC technology provides performance boosts

3D integration technology has split into a number of different approaches, each of which brings a different combination of benefits in terms of performance.
Article  |  Topics: IP - Assembly & Integration, EDA - DFM  |  Tags: , ,   |  Organizations:
February 23, 2018
Ashish Darbari is CEO of formal verification consultancy Axiomise.

Doc Formal: Living verification in the fast lane

Why is formal verification not getting the traction it should. The good doctor has some thoughts on that... and a new solution.
May 22, 2017
Ashish Darbari is CEO of formal verification consultancy Axiomise.

Introducing Doc Formal: the journey so far

Our new columnist introduces himself and traces the progress of formal verification over the last two decades. Join the discussion.
January 26, 2015
Silicon Photonics litho featured image

How lithography simulations enable silicon photonics

Precise curved geometries are vital to making this emerging and cost-effective CMOS-based technology work. This primer explains its advantages and how litho tools are evolving to meet the challenges it presents.

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