DAC 2018 preview: Real Intent
Real Intent’s move into post-synthesis CDC debug leads its DAC 2018 activities, with technical papers on its new Verix PhyCDC tool also now online for those who cannot make it.
Real Intent’s move into post-synthesis CDC debug leads its DAC 2018 activities, with technical papers on its new Verix PhyCDC tool also now online for those who cannot make it.
The portable stimulus pioneer will demonstrate how the technology and standard have been leveraged for its new Trek5 release.
Panasonic and AIST have turned a resistive memory (RRAM) into a hydrogen sensor that they claim works at much lower energy than existing designs.
Despite the intense R&D going into storage-class and other novel forms of non-volatile memories, flash is set to continue as the bulk memory of choice, Micron executive claims in VLSI Symposia keynote.
Researchers from the UC Berkeley and Intel teamed up to develop an energy-tuneable RF front-end on a digital finFET process with no need for analog process options.
Mentor will be present throughout the DAC program but with a particular focus on machine learning, artificial intelligence and automotive challenges.
Functional safety specialist will demonstrate extensions to its own suite and co-host demos highlighting its collaboration with OneSpin Solutions.
Verification of the coming generation of highly autonomous vehicles needs says Peter Davies, director of security concepts at Thales.
What does it take to build data converter IP that will meet the reliability and functional safety requirements of the automotive industry?
The Electronic System Design Alliance will discuss its recent decision to join SEMI and highlight DAC’s new Infrastructure Alley.