DAC 2018 preview: Breker Verification Systems

By TDF Staff |  No Comments  |  Posted: June 21, 2018
Topics/Categories: Conferences, Blog - EDA, - Verification  |  Tags: , ,  | Organizations:

Breker Verification Systems, a leading provider of Portable Stimulus-compliant software, will highlight the latest version of its Trek portfolio at this year’s Design Automation Conference on Booth #1419 at Moscone West in San Francisco (Conference: June 24-28. Exhibition: June 25-27). The Trek update provides full compliance to the 1.0 release of Accellera’s Portable Stimulus Specification (PSS).

Breker was a founding member and participates in the Accellera Portable Stimulus Working Group (PSWG). The company contributed a working C++ language representation for the PSS standardization efforts. In 2008, it introduced a graph-based approach for test case synthesis that formed the basis of the standard.

The Trek product suite and apps now give chip design verification groups true verification GPS (Graph-based, Portable, Shareable) to exploit portable stimulus.

According to Breker’s rubric, the Graph-based intent specification provides Portability across verification platforms, scaling from IP, prototyping and final silicon. It is Shareable across global diverse teams, project revisions and communication channels.

The new Trek5 portfoliop aims to leverage its testbench and test synthesis technology to accelerate and simplify complex test case generation for UVM and system-on-chip SoC verification flows. Components include TrekSoC, TrekUVM, TrekSoC-Si and several TrekApps.

Trek5’s scenario modeling methods offer full and complete support for Accellera PSS version 1.0 Domain Specific Language (DSL), as well as the PSS C++ Format. It also includes support for an extended native C++ mode and is backward compatible from previous formats.

Its model configuration capabilities with scenario path constraints provide high-level configuration of graph-based models, a full hardware/software interface (HSI) layer and enhanced procedural modeling options over the base PSS declarative capability. New test synthesis technology has advanced solver engines, test case scheduling and synchronization engines, UVM and SoC deployment optimizers, memory management and system services modules.

Several more advances add a new visual editor GUI that allows scenario models to be drawn as graphs automatically generating PSS code, along with an updated test map and graph viewers that display synchronized multi-threaded UVM or C tests. Trek5 offers enhanced cache coherency, power domain and ARMv8 Verification TrekApps, along with full support for and integration with third-party simulators, emulators and debug environments such as Synopsys’ Verdi.

TrekSoC and TrekUVM are in use at large and mid-sized semiconductor companies worldwide. Using an intelligent testbench approach, the tools synthesize PSS scenario models to create advanced test-case sets that can be deployed within existing UVM and SoC verification environments. This seeks to offer UVM multi-threaded tests without the authoring burden, and software-driven plus transactional SoC tests that fully prove complex operation scenarios such as cache coherency. Multiple deployment models provide easy insertion of the test sets, plus generated scoreboards and coverage models, into existing testbenches across the entire verification process, allowing for direct debug and coverage analysis of operational scenarios. Applications are servers, networking, GPUs, FPGAs and mobile and base stations for cellular wireless.

Breker events at DAC 2018

DAC attendees will have the opportunity to learn about “End-to-end Verification with Portable Stimulus on Mixed Signal DSP and Automotive SoCs, a joint poster presentation by Analog Devices and Breker during the Designer/IP Track Poster Session and Networking reception (Tuesday, June 26, 5:00pm-6:00pm.

Adnan Hamid, Breker’s CE), will join a DAC panel discussion, “Portable Stimulus: Design and Verification (R)Evolution,” (Wednesday, June 27, 1:30pm- 3:00pm) exploring the impact of the Stimulus Standard on the verification ecosystem.

Breker is a co-host of ‘Verified’, a celebration of the verification ecosystem taking place on, Monday, June 25 from 8:00pm at the Golden Gate Tap Room. Tickets for the invitation-only event are available by visiting the Breker booth.

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