FPGA playing verification catch-up as bugs escape
The latest Mentor-commissioned Wilson Research Group study on ASIC and FPGA verification highlights technique adoption and maturity.
The latest Mentor-commissioned Wilson Research Group study on ASIC and FPGA verification highlights technique adoption and maturity.
Next week’s DVCon Europe conference in Munich will tackle a range of topics, from analog verification to the use of machine learning for functional verification, backed up with case studies on the use of TLM and SystemC in live projects.
Following deals with Imperas and Percepio, UltraSoC has released an IDE aimed at debug, run control, performance tuning and runtime analytics for SoC development.
Synopsys is taking IC design on TSMC processes into the cloud with the launch of the Synopsys Cloud Solution, which will run on platforms from Synopsys, Amazon Web Services (AWS) or Microsoft Azure.
A recent white paper from Synopsys outlines the complexities of developing hardware for use in machine-learning and artificial-intelligence (AI) systems.
SureCore is introducing an IP customization service intended to deliver SRAM cores tuned to specific power and performance requirements for wearable, wireless, augmented reality, and IoT devices.
Two keynote speakers have been announced for DVCon Europe 2018, which takes place next month.
Suppliers to the embedded industry see modules and readymade software as being key to getting IoT projects off the ground.
Yokogawa has moved to a modular architecture to handle the growing number of complex applications that are emerging in power testing.
Dialog Semiconductor aims to expand its use of configurable mixed-signal circuitry across its product line following its acquisition of specialist Silego a year ago.