Overcoming the power/performance paradox in processor IP
The configurability of processor IP such as Synopsys' ARC HS family gives designers the option to optimise for power, performance or a combination of both.
IP Topics
Accelerating multi-corner multi-mode sign-off using the Lynx Design System
Mixed-signal chip designer Semtech on using Lynx Design System to manage multi-corner multi-mode sign-off when you've got 306 scenarios to check.
Standard cell IP must pass the litho-friendly routing test
Lithography is only just beginning to play a role in cell IP selection but early analysis already matters.
Prototyping solutions for validation of complex ASIC IP
An in-depth look at the role of FPGA-based prototyping and the validation use cases it offers when integrating complex blocks.
Using HAPS to streamline IP to SoC integration
The HAPS prototyping system can help designers integrate IP into SoCs more quickly.
Consistency key to gaining the advantages of IP integration
Consistency is vital to IP integration strategies that rely on developing an SoC using a hierarchy of FPGA-based prototypes.
FPGA-based prototyping to validate the integration of IP into an SoC
A case study describing validation of the integration of USB3.0 and USB2.0 interface IP that illustrates broader challenges FPGA-based prototyping presents.
DRAM interfaces for mobile and networking designs
Mobile and networking platforms need high bandwidth, low power consumption, and small footprint. These needs drove standards, such as LPDDR4, Wide I/O 2 and Hybrid Memory Cube.
Accelerating process migration in advanced ASIC design at Bull
How the HPC company used Synopsys' Lynx Design System to standardise its flow and simplify migration to the next node.
Why use USB 3.0?
The first of a series of seven articles describing the key details of the USB 3.0 protocol.
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