Tech Design Forums
Technique
ARC
ARC
All
(1)
Articles
(1)
April 28, 2014
Overcoming the power/performance paradox in processor IP
The configurability of processor IP such as Synopsys' ARC HS family gives designers the option to optimise for power, performance or a combination of both.
Article | Topics:
IP - Selection
| Tags:
ARC
,
configurable processor
,
low-power design
| Organizations:
Synopsys
IP Topics
Assembly & Integration
Design Management
Selection
Tech Design Forum
EDA
EDA TOPICS
DFM
DFT
ESL
IC Implementation
Verification
MORE EDA
Expert Insights
Guides
EDA Home Page
IP
IP TOPICS
Assembly & Integration
Design Management
Selection
MORE IP
Expert Insights
Guides
IP Home Page
PCB
PCB TOPICS
Design Integrity
Layout & Routing
System Codesign
MORE PCB
Expert Insights
Guides
PCB Home Page
Embedded
EMBEDDED TOPICS
Architecture & Design
Integration & Debug
Platforms
User Experience
MORE EMBEDDED
Expert Insights
Guides
Embedded Home Page