USB 3.0 protocol layer – part 1
A first look at the role of the protocol layer in USB 3.0.
IP Topics
The USB 3.0 Functional Layer
A look at the USB 3.0 functional layer, an application layer and system software on the host side, and a logical function and device on the device side.
USB 3.0 protocol layer – part 2
A look at the role of four types of transaction in the USB 3.0 protocol layer: bulk, control, interrupt and isochronous.
The USB 3.0 Physical Layer
A look at the USB 3.0 physical layer, including the PHY and the physical connection between two ports, which is carried on two differential data pairs.
Proving the 20nm ecosystem with the ARM Mali GPU
What ARM learnt when it ran a Mali GPU-based test chip through a Synopsys tool flow onto a TSMC 20nm process
Formal techniques tackle the SoC verification challenge
Formal verification techniques are becoming more widely used as the size and complexity of SoCs and increases.
Eliminating iterations in gigahertz ASIC handoff
How Cisco eliminated iterations in the ASIC handoff of a gigahertz networking chip by using physically aware synthesis
The challenge of clock domain crossings – and some solutions
Clock domain crossing bugs undermine the productivity gains of moving to block-based design, but can be tackled through hierarchical formal analysis.
Enabling greater productivity and schedule predictability in IC design
How to speed project start-up, boost designer productivity and increase schedule predictability using design management tools.
Facing the verification management challenge
The growing verification challenge, and how to address it by coordinating multiple debug strategies.
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