Hardware trojan attacks and countermeasures
IC designers are becoming increasingly worried about the possibility of third parties inserting malicious 'trojan' circuitry into their ICs.
IP Topics
On-chip clock strategies and GALS
The increased use of IP and a rise in process variability is driving a move to look at alternatives to traditional low-skew clock distribution strategies.
Protecting IP in a collaborative signoff environment
The encryption chain for today's highly collaborative designs needs to be managed with care.
Overcoming the power/performance paradox in processor IP
The configurability of processor IP such as Synopsys' ARC HS family gives designers the option to optimise for power, performance or a combination of both.
Accelerating multi-corner multi-mode sign-off using the Lynx Design System
Mixed-signal chip designer Semtech on using Lynx Design System to manage multi-corner multi-mode sign-off when you've got 306 scenarios to check.
Standard cell IP must pass the litho-friendly routing test
Lithography is only just beginning to play a role in cell IP selection but early analysis already matters.
Prototyping solutions for validation of complex ASIC IP
An in-depth look at the role of FPGA-based prototyping and the validation use cases it offers when integrating complex blocks.
Using HAPS to streamline IP to SoC integration
The HAPS prototyping system can help designers integrate IP into SoCs more quickly.
Consistency key to gaining the advantages of IP integration
Consistency is vital to IP integration strategies that rely on developing an SoC using a hierarchy of FPGA-based prototypes.
X propagation
X propagation within RTL simulations can hide fatal bugs. Uncovering and eliminating the effect improves design quality and avoids respins.
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