IP Topics

February 25, 2011

How to create adaptors between modeling abstraction levels

The article is abstracted from a presentation given at NASCUG by Umesh Sisodia and originally developed by Ashwani Singh of CircuitSutra Technologies on how to create adaptors between various modeling abstraction levels in SystemC.
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September 10, 2010

Parallel simulation of SystemC TLM 2.0 compliant MPSoCs

Simulation speed is a key issue for the virtual prototyping (VP) of multiprocessor system-on-chips (MPSoCs). The SystemC transaction level modeling (TLM) 2.0 scheme accelerates simulation by using interface method calls (IMC) to implement communication between hardware components. Acceleration can also be achieved using parallel simulation. Multicore workstations are moving into the computing mainstream, and symmetric [...]
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December 1, 2009

Raising the bar to manage R&D and ROI

Semiconductor companies are hustling to grow revenues, stay on the razor’s edge of technology and remain one step ahead of their customers’ needs. All this is going on while the industry is undergoing wrenching change. The end of 2009 finds the chip business at a crossroads. It has been more than 60 years since the […]

September 1, 2008

Building reusable verification environments with OVM

This article reviews the reuse potential within the Open Verification Methodology, with special focus on four particularly fruitful areas: testbench architecture, testbench configuration control, sequences, and class factories.
December 1, 2005

IP protection under OASIS

Companies and mask shops already have plans and policies to secure the storage and transmission of sensitive layout VLSI data. These include confidentiality and non-disclosure agreements, and encryption. However, traditional VLSI file formats such as GDSII never popularized the type of constructs that facilitate intellectual property (IP) protection. The OASIS format does have these constructs. […]

June 1, 2005

Improving team productivity with efficient data management for SoC designs

The efficient management and synchronization of design data is now a necessity and no longer something that is a ‘nice-to-have’. Design complexity continues to increase with one result being that development spreads across several groups (often in different places). A project may also have several thousands design files generated by various tools from different vendors […]

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