IP Topics

July 26, 2012
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Optimizing cloud computing for faster semiconductor design

How Cadence, Intel and Xuropa accelerated the semiconductor design process by squeezing 15% more capacity out of a virtualized server farm
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July 11, 2012

Welcome to IJTAG: a no-risk path to IEEE P1687

Making a smooth transition to IJTAG, the scan-test strategy for IP blocks, without having to change your existing hardware.
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August 23, 2011

Ensuring the reliability of non-volatile memory in SoC designs

This article describes various non-volatile memory (NVM) intellectual property (IP) alternatives with specific reference to their integration within system-on-chip designs targeting the 65nm process node and below. The article considers many of the strengths and vulnerabilities of these IP options, and then describes the tests that must be undertaken to ensure their long-term reliability, particularly [...]
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April 1, 2011

Enabling tomorrow’s connected TV user experience with open platform development

New open software platforms can dramatically advance the way consumers interact with the Internet via their televisions and an expanding array of TV-like mobile devices. Ultimately consumers will be able to access websites that are fully optimized for the TV platform. Today, this experience is primarily delivered via widgets—containerized web pages or information portals that [...]
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April 1, 2011

Business economics drive open source strategies

The GENIVI Alliance is already accelerating cross-industry standards development only two years since its formation, says Joel Hoffmann.
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April 1, 2011

Do you need a 1GHz MPU to run Linux and Android?

There are strategies, tools and devices to get the best from these OSs without buying a higher-end MPU, says Jacko Wilbrink.
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April 1, 2011

Home sweet smart home

As part of our utility metering focus, Sean Murphy offers a US perspective on the challenges.
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February 25, 2011

How to create adaptors between modeling abstraction levels

The article is abstracted from a presentation given at NASCUG by Umesh Sisodia and originally developed by Ashwani Singh of CircuitSutra Technologies on how to create adaptors between various modeling abstraction levels in SystemC.
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September 10, 2010

Parallel simulation of SystemC TLM 2.0 compliant MPSoCs

Simulation speed is a key issue for the virtual prototyping (VP) of multiprocessor system-on-chips (MPSoCs). The SystemC transaction level modeling (TLM) 2.0 scheme accelerates simulation by using interface method calls (IMC) to implement communication between hardware components. Acceleration can also be achieved using parallel simulation. Multicore workstations are moving into the computing mainstream, and symmetric [...]
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December 1, 2009

Raising the bar to manage R&D and ROI

Semiconductor companies are hustling to grow revenues, stay on the razor’s edge of technology and remain one step ahead of their customers’ needs. All this is going on while the industry is undergoing wrenching change. The end of 2009 finds the chip business at a crossroads. It has been more than 60 years since the […]

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