IP Topics

Mentor's Stephen Pateras explains how the proposed IJTAG standard speeds IP test by replacing time-consuming custom and ad hoc methodologies.

How Cadence, Intel and Xuropa accelerated the semiconductor design process by squeezing 15% more capacity out of a virtualized server farm

Making a smooth transition to IJTAG, the scan-test strategy for IP blocks, without having to change your existing hardware.

This article describes various non-volatile memory (NVM) intellectual property (IP) alternatives with specific reference to their integration within system-on-chip designs targeting the 65nm process node and below. The article considers many of the strengths and vulnerabilities of these IP options, and then describes the tests that must be undertaken to ensure their long-term reliability, particularly [...]

New open software platforms can dramatically advance the way consumers interact with the Internet via their televisions and an expanding array of TV-like mobile devices. Ultimately consumers will be able to access websites that are fully optimized for the TV platform. Today, this experience is primarily delivered via widgets—containerized web pages or information portals that [...]

The GENIVI Alliance is already accelerating cross-industry standards development only two years since its formation, says Joel Hoffmann.

There are strategies, tools and devices to get the best from these OSs without buying a higher-end MPU, says Jacko Wilbrink.

As part of our utility metering focus, Sean Murphy offers a US perspective on the challenges.

The article is abstracted from a presentation given at NASCUG by Umesh Sisodia and originally developed by Ashwani Singh of CircuitSutra Technologies on how to create adaptors between various modeling abstraction levels in SystemC.

Simulation speed is a key issue for the virtual prototyping (VP) of multiprocessor system-on-chips (MPSoCs). The SystemC transaction level modeling (TLM) 2.0 scheme accelerates simulation by using interface method calls (IMC) to implement communication between hardware components. Acceleration can also be achieved using parallel simulation. Multicore workstations are moving into the computing mainstream, and symmetric [...]