Cadence has stripped out some of the image-processing functions of the Vision P6 and boosted the number of execution units to build a DSP aimed at deep learning.
Solido aims to bring the types of machine-learning techniques the company has used for its physical-analysis tools to a wider range of EDA tools through the launch of its ML Labs initiative.
A report put together by the European Union's Hipeac embedded architecture research network claims the challenges of highly interconnected embedded systems will call for what amounts to the reinvention of computing.
Ceva has launched the fifth generation of its vision-oriented DSP core family with an architecture tuned for the fast-growing area of convolutional neural networks and deep learning.
EEMBC has turned its attention to heterogeneous computing with plans to create a new set of benchmarks.
Cadence Design Systems has increased the throughput of its vision-oriented DSP family to cater for deep-learning applications.
The 53rd Design Automation Conference has published its program for the upcoming event in Austin, Texas, which will include keynotes from AMD, nVidia, and NXP Semiconductors and tracks that connect electronics to biology.
Ceva has launched a software package intended to streamline the porting of convolutional neural network implementations to the XM4 DSP core.
Memory efficiency has driven the design of the latest video and image processor core developed by Cadence Tensilica.
Altera has agreed to Intel's offer to buy the company, with FPGAs to be integrated into Xeon processors after 2016. Atoms will join programmable logic in IoT-oriented devices.
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