EDA Topics

An in-depth look at the role of FPGA-based prototyping and the validation use cases it offers when integrating complex blocks.

Verification of hardware and software has become a key bottleneck for chip design. Hardware-assisted verification is removing that bottleneck.

The next boost to verification productivity will come from the integration of multiple strategies and tools.

Catching x-propagation issues at RTL saves time and reduces uncertainty in gate-level verification

Increasingly complex state machines are driving the need for smarter ways of reporting errors such as deadlocks and unreachable code in the source RTL.

Advanced tools are being applied to established nodes to produce advanced designs for volume markets.

The number of scenarios needed for MCMM timing analysis has skyrocketed. IC implementation calls for a concurrent approach to deal with the issue.

The fourth installment discusses the extra levels of debug capability available when using virtual prototypes through the example of an ARM big.LITTLE-based embedded system.

Advanced design isn’t restricted to emerging process nodes any more. Designers are using the latest tools to produce advanced designs on established nodes.

Find how to spot some of the most common false clock-domain crossing (CDC) violations and how to efficiently find actual CDC problems that could kill a design if not corrected.