error reporting

January 25, 2019

A better way to manage error reporting at the chip and block levels

In a continuous-build design flow, at which level should your error markers be addressed?
Article  |  Topics: EDA - IC Implementation  |  Tags: , , , , ,   |  Organizations:
February 26, 2014
Lisa Piper is senior manager of technical marketing at Real Intent.

Complexity drives smart reporting

Increasingly complex state machines are driving the need for smarter ways of reporting errors such as deadlocks and unreachable code in the source RTL.
Expert Insight  |  Topics: EDA - Verification  |  Tags: , , , , ,   |  Organizations:

PLATINUM SPONSORS

Synopsys Cadence Design Systems Mentor - A Siemens Business
View All Sponsors