November 24, 2015
Achieving IoT security means addressing every link in the chain, from the quality of your application code to embedding a root of trust in the hardware.
November 6, 2015
How to save test time and test costs by doing more tests in parallel, increasing compression, pooling tester memory, managing branching - and more
November 2, 2015
This article shows practical ways to use verification IP for greater productivity with specific code examples from Mentor Graphics' Questa platform.
October 29, 2015
The 10nm process will see changes to multiple patterning that demands changes in the implementation flow, along with an increased focus on the effects of variability.
October 28, 2015
Although FastSPICE simulators are in almost every design flow, requirements are moving beyond the capabilities they can provide. Parallel processing provides a solution.
October 21, 2015
Part three of our series looks at the choices you face as you decide whether to build or buy a board.
October 19, 2015
Verification IP can help verify that memory-controller implementations meet standards; test an implementation against specific memories; and drive traffic for SoC verification and power analysis. Here's how to choose it.
October 8, 2015
A look at what it takes to verify low-power SoC designs, including setting objectives and measuring outcomes in a UPF-driven verification strategy
September 28, 2015
Part two of our series on FPGA-based prototyping looks at two critical factors to address before a project begins: budgeting and high-level implementation.
September 24, 2015
High-level synthesis provides a way to explore hardware architectures to come up with the most efficient implementation for a given situation. But it has taken time for verification techniques to catch up with the idea and ensure design and architecture match.