EDA

What hardware designers can learn from software verification techniques such as agile, behaviour-driven development, code coverage and zero known defect strategies

Considering design style, assertions, engines and coverage can help ease the development of an effective formal verification test plan

How agile methodologies can be applied to personal and team practice in IC design, including for developing cloud accelerators at Microsoft

Verifying MIPI interfaces including CSI-2, CPHY, DPHY, MPY, Unipro and the UFS host controller on complex SoCs - should you make or buy the necessary VIP?

Eight issues to consider when choosing an FPGA tool, including risk minimisation, routing issues, ability to iterate, IP freedom and more

Complex processes and aggressive synthesis interventions are increasing the risks of metastability, creating a need for netlist-level CDC verification

Research study suggests the maturity of your verification flow determines the likelihood of first-pass success far more than the complexity inherent in design size.

Mid-market users are driving richer features and cost competition into PCB design software like never before, largely thanks to the Internet of Things.

Ethernet is set to become one of the key communications standards for automotive. Early system-level simulation lets designers gauge performance before moving to hardware prototypes.

Second in a two-part series, describing critical rules that should underpin PCB manufacturing, and how new technologies overcome increasing complexity.