power integrity

May 18, 2015

Vehicle ethernet adds to IP virtual reference kits for board design

Automotive ethernet is the latest virtual reference design platform to be added to the family of models developed by Cadence to support its physical-layer IP cores.
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March 24, 2015

Mentor unites chip-to-package flow with Xpedition Package Integrator

Flow draws on existing strengths in Xpedition, Valor, Nimbic and Flotherm among others to optimize 3D design projects and improve cross-disciplinary communication.
January 28, 2015

Cadence updates Sigrity tools and license options

Cadence Design Systems has added LPDDR4 support and a topology explorer to its Sigrity lineup for signal and power integrity analysis of PCB-based designs, as well as more flexible licensing options.
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September 29, 2014

Heat becomes design assist for power supply layout

To make a high-efficiency power supply XP Power used heat as an additional design variable with an architecture that turns conventional wisdom over one aspect of component reliability on its head.
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August 13, 2014

Thermal limits challenge Hot Chips power pair

Two of the custom designs presented at the 26th Hot Chips in Cupertino exemplified the problems caused by increasing power density and the benefits of looking at heat removal at the system level.
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August 5, 2014

Cadence takes Voltus to transistor level

Cadence Design Systems has introduced a variant of Voltus that runs transistor-level simulations to check for electromigration and IR-drop problems.
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October 24, 2012

Board-level DRC tool to find signal-integrity problems

Mentor Graphics has added to its HyperLynx suite a tool that uses design-rule check (DRC) techniques rather than simulation to look for potential signal-integrity problems.
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