EDA Topics

P2P (point-to-point) resistance is fundamental to IC reliability verification. Handle it more efficiently with detailed, automated path layout analysis.

A new clock-domain crossing methodology is described and results provided to show how automation delivers greater efficiency.

Master the three prerequisites of format translation and chose the right one from the various translation strategies.

How an integrated design environment can help you overcome complexities within the Universal Verification Methodology and manage the size of the libraries within it.

How Siemens PAVE 360 platform leverages emulation to deliver the exhaustive test required for the incoming generation of autonomous vehicles.

A look at some of the key techniques needed to ensue good code coverage during the verification of low-power SoC designs.

A look at ways to improve LVS debug productivity on complex SoCs through more narrowly targeted debug strategies.

The vision of portable stimulus is to find a way to write tests that can be portable ‘vertically’ from IP block to subsystem to system, and ‘horizontally’ from simulation to emulation to silicon. However, applying portable stimulus to real chip designs is not trivial.

It's the fiftieth International Test Conference this year. How much has been achieved and how much more work is there to do to ensure that we can keep building chips that do what they are supposed to?

Why developing an IoT design environment demands an integrated, top-down design flow that combines AMS, digital, RF, photonics, and MEMS design and verification tools.