ESL

April 10, 2013
Richard Goering, senior manager of technical communications, Cadence

Focus on product creation for effective design

An increasingly important concept in design is that of product creation. An approach based on product creation looks beyond chip or board design.
January 18, 2013

Get more out of system architectures

This case study shows how the evaluation of various design options requires a thorough approach to system-level modeling.
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November 16, 2012
Synopsys Virtualizer screen shot

The Shift Left: how virtual prototyping reduces risk

The business case behind how virtual prototyping speeds development, improves hardware and software quality, and improves ROI.
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October 26, 2012

Emulation delivers system-level power verification

Overcome the time and visibility limitations of simulation and of gate-level and RTL-based strategies to achieve full-chip analysis.
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October 25, 2012

Vivado HLS/AutoESL: Agilent packet engine case study

How Xilinx' Vivado HLS enabled the creation of an in-fabric, processor-free UDP network packet engine
October 23, 2012

Vivado, inside the new Xilinx design suite

The FPGA vendor's new flagship is now on public release. It adds an array of features, including support for system-level to HDL synthesis.
October 3, 2012

System virtual prototyping

The technique enables early software development and hardware/software co-design strategies before a project is more rigidly defined in RTL.
September 18, 2012
Bill Neifert

Virtual prototyping moves further into the mainstream

Carbon Design Systems' CTO Bill Neifert argues that his company's deal with Samsung sends a clear signal, whether or not you're one of his customers.
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March 28, 2012

SystemC

How SystemC enables system modelling at higher levels of abstraction, and the creation of virtual platforms.
March 7, 2012

Three essential steps to SoC design and verification

An evolved ESL-to-RTL methodology flow addresses the ‘discipline gaps’ between software and hardware engineering by using three system level-based software-hardware verification steps. The strategy is already available in TSMC’s Reference Flow 12.

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