Vivado HLS/AutoESL: Agilent packet engine case study
How Xilinx' Vivado HLS enabled the creation of an in-fabric, processor-free UDP network packet engine
The paper discusses the simulation, design, and test of software-defined radios (SDRs), initially using a legacy 16QAM waveform, followed by a new SDR waveform -orthogonal frequency division multiple access (OFDMA). The SDR system’s error vector magnitude (EVM) is first analyzed and its performance is compared with the legacy waveform results. The implementation also includes the […]