Tech Design Forums
Technique
Forte Design Systems
Forte Design Systems
December 16, 2013
How high-level synthesis helps optimize low power designs – Part Two
Continuing our series on high-level synthesis (HLS) for low power design. Part Two details how HLS helps you make and evaluate architectural decisions.
Article | Topics:
EDA - ESL
,
IC Implementation
| Tags:
architecture
,
high-level synthesis (HLS)
,
low power
,
Power architecture
| Organizations:
Forte Design Systems
October 21, 2013
How high-level synthesis helps optimize low power designs – Part One
Going inside HLS' basics shows how it can deliver power savings over 50% for some applications.
Article | Topics:
EDA - ESL
,
IC Implementation
| Tags:
high-level synthesis (HLS)
,
low power
| Organizations:
Forte Design Systems
EDA Topics
DFM
DFT
ESL
IC Implementation
Verification
PLATINUM SPONSORS
View All Sponsors
twitter
facebook
RSS
Tech Design Forum
Log In
Register
Sponsors
Briefing
EDA
EDA TOPICS
DFM
DFT
ESL
IC Implementation
Verification
MORE EDA
Expert Insights
Guides
EDA Home Page
IP
IP TOPICS
Assembly & Integration
Design Management
Selection
MORE IP
Expert Insights
Guides
IP Home Page
PCB
PCB TOPICS
Design Integrity
Layout & Routing
System Codesign
MORE PCB
Expert Insights
Guides
PCB Home Page
Embedded
EMBEDDED TOPICS
Architecture & Design
Integration & Debug
Platforms
User Experience
MORE EMBEDDED
Expert Insights
Guides
Embedded Home Page
Search