Verifying clock domain crossings in UPF-based low-power SoCs
The verification challenges of using low-power design techniques to enable advanced power-management strategies in complex SoCs.
EDA
Adding system-level, post-layout electrical analysis to HDAP design and verification
Adoption of high-density advanced packaging (HDAP) needs tools and supports to build designers' confidence in the emerging technology.
Understanding USB 3.2 and Type-C
The basics of USB 3.2, how to implement it in an SoC, and how USB Type-C connectors and cables are used in USB 3.2 systems.
8.8 billion miles to verify
How the digital twin can fuel automotive verification flows impossible in the real world.
Reliability verification: It’s all about the baseline
How you can use the dedicated rule decks now being provided by foundries as the foundation for a reliability verification flow.
Why AI needs security
As AI becomes pervasive in computing applications, so too does the need for high-grade security in all levels of the system.
Using threat models and risk assessments to define device security requirements
The proliferation of attacks against embedded systems is making designers realize that they need to do more to secure their products and ecosystems.
How to improve throughput for gate-level simulation
Innovative methodologies, strategies and tool features help overcome other inefficiencies in complex but necessary simulations.
An open-source framework for greater flexibility in machine-learning development
Exchange frameworks are emerging to make it easier for neural-network developers to swap between development environments.
Flexible embedded vision processing architectures for machine-learning applications
Machine-learning strategies for embedded vision are evolving so quickly that designers need access to flexible, heterogenous processor architectures that can adapt as the algorithms evolve.
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