Tech Design Forum Briefing


Briefing Authors

Paul Dempsey

Paul Dempsey Paul Dempsey has been a technology journalist for 20 years. His work has also appeared in EETimes, Red Herring and specialist journals published by the Financial Times.

Luke Collins

Luke Collins Luke Collins is a freelance technology journalist with 22 years’ experience. He is a former Editor-in-Chief of Electronics Times in the UK, and co-founded the IP9x series of conferences.

Chris Edwards

Chris Edwards Chris Edwards has spent two decades covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology.
September 30, 2019

Master the design and verification of next gen transport: Part One – overview

What design solutions can best help deliver increasingly complex autonomous and ADAS systems?

Tags: , , , , , ,  |  Comments Off on Master the design and verification of next gen transport: Part One – overview
September 30, 2019

Arm TechCon 2019 preview: Mentor

Mentor is active across the program at Arm TechCon with a range of conference and booth talks, demonstrations and presentations.

Tags: , , , , , , ,  |  Comments Off on Arm TechCon 2019 preview: Mentor
September 27, 2019

Accellera adds detail to proposed security assurance model

Accellera’s security assurance working group has set out some of its plans in a white paper.

Tags: , ,  |  Comments Off on Accellera adds detail to proposed security assurance model
September 23, 2019

Automating wire-harness development

Harness manufacture in automotive remains manually intensive but model-based engineering provides a way to streamline the processes to make them more efficient, a Mentor white paper claims.

Tags: , , ,  |  Comments Off on Automating wire-harness development
September 18, 2019

Ceva shares weights for lower DNN overhead

Ceva has employed a more extensive form of weight compression in its latest generation of DNN processor cores.

Tags: , , ,  |  Comments Off on Ceva shares weights for lower DNN overhead
September 18, 2019

Synopsys claims 35TOPS performance from new family of embedded vision cores

IP core focuses on avodiing memory access bottlenecks during processing of complex machine-learning and artificial-intelligence algortihms.

Tags: , , ,  |  Comments Off on Synopsys claims 35TOPS performance from new family of embedded vision cores
September 18, 2019

Cadence expands system analysis to thermal

Cadence has followed its launched of a parallelizable EM simulator with one that focuses on the thermal behavior of ICs through to multi-PCB assemblies.

Tags: ,  |  Comments Off on Cadence expands system analysis to thermal
September 11, 2019

Embedded design meets low-code in Siemens integration plans

Siemens is combining recent acquisitions in novel ways, including one that will see a web-app development package interact more closely with Mentor’s embedded offerings.

Tags: , , , ,  |  Comments Off on Embedded design meets low-code in Siemens integration plans
September 10, 2019

Digital twin points the way to system-level vehicle safety

The digital-twin concept provides several avenues to achieving better safety analysis and is likely to benefit from Siemens’ integration of Mentor activities.

Tags: , , , , ,  |  Comments Off on Digital twin points the way to system-level vehicle safety
September 5, 2019

DVCon keynotes to look at edge computing and network evolution

DVCon Europe, Accellera’s design and verification conference to be held in Munich in late October, will feature keynotes on the trends toward edge computing and the future of networks.

Tags: , , , ,  |  Comments Off on DVCon keynotes to look at edge computing and network evolution
Previous Blog Posts
Next Blog Posts