Tech Design Forum Briefing


Briefing Authors

Paul Dempsey

Paul Dempsey Paul Dempsey has been a technology journalist for 20 years. His work has also appeared in EETimes, Red Herring and specialist journals published by the Financial Times.

Luke Collins

Luke Collins Luke Collins is a freelance technology journalist with 22 years’ experience. He is a former Editor-in-Chief of Electronics Times in the UK, and co-founded the IP9x series of conferences.

Chris Edwards

Chris Edwards Chris Edwards has spent two decades covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology.
April 18, 2013

Accellera publishes tag standard for soft IP

Accellera Systems Initiative has published version of 1.0 of its Soft IP Tagging standard for adding licensing information to RTL and other design files.

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April 18, 2013

ARM intros single-use licence for Big-Little

ARM has decided to put together a package deal for some of the components that will let prospective customers implement a multiprocessor subsystem in a single SoC design

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April 10, 2013

FinFET father headlines Mentor’s west coast user conference

Dr Chenming Hu joins Mentor CEO Wally Rhines and Xilinx SVP Victor Peng to keynote free day-long User2User in San Jose on April 25th, capping a full technical program.

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April 10, 2013

The wrong units of compute

Scale-out computing has demands so different from conventional applications that it could reshape the way to design one class of multicore processors.

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April 10, 2013

3D-IC cooling ascends the agenda

US defense research agency DARPA sets targets for cooling overall systems and hot spots in stacked silicon, and backs joint research from Rockwell-Collins and Georgia Tech.

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April 10, 2013

H.265 begins to flavor the video codec soup

Two vendors have announced early adopter software implementations of the new video compression standard that promises an up to 50% bandwidth cut against H.264.

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April 10, 2013

ProPlus enters simulation with turbo-charged parallel SPICE

The device modeling specialist has integrated its new NanoSpice simulator with existing capture and analysis tools in a broad design-for-yield package.

April 9, 2013

New tools reinvigorate older processes

At DATE 2013, Synopsys senior vice president Antun Domic, described how techniques for the latest nodes are being rolled back into mature nodes, all the way to 180nm.

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April 8, 2013

DAC 2013 Preview II: Panels

FinFETs, ever proliferating verification, 3DIC, security and more feature on our guide to some of the most intriguing panels at DAC 2013.

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April 4, 2013

Accellera extends verification work to legacy environments

Accellera Systems Initiative has created a working group to look at one of the knottiest problems in IC design: to simplify the job of checking designs when the bits come from so many sources and use languages that were not built for interoperability.

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