DDR5


February 24, 2020

DVCon US 2020 preview: SmartDV

The latest in MIPI and DDR design and verification IP as well as protocol debug are highlights in SmartDV's DVCon program.
Article  |  Topics: Blog - IP, - Verification  |  Tags: , , , , , , ,   |  Organizations: ,
December 14, 2018

Synopsys announces DDR5 and LPDDR5 interface IP

Synopsys is targeting artificial intelligence (AI) and data centre SoCs as key application areas for the interface IP.
Article  |  Topics: Product  |  Tags: , , ,   |  Organizations: , , ,

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