Ultrasoc tweaks debug technology to act as SoC burglar alarm
Ultrasoc is adding security monitoring to its toolkit, providing SoC designers with a mechanism for their chips to warn of attempts by hackers to break into secure areas.
IP
Performance and timeout checks added to on-chip network
Sonics has add static performance analysis to its SonicsStudio tool and timeout detection to its SonicsGN network intended to prevent SoCs locking up.
UltraSoC adds CoreSight and Ceva debug support
UltraSoC is extending its debug support for a variety of processor cores through compatibility with ARM’s CoreSight debug system as well as support for Ceva’s DSP cores.
ARM ports Trustzone down to Cortex-M
ARM is bringing the Trustzone security architecture to future Cortex-M processor cores, combining that with a version of AHB that will recognise the difference between secure and non-secure transactions.
ARM targets cache-coherent GPU computing with CoreLink addition
ARM has developed a version of its CoreLink on-chip interconnect IP intended to support systems based on its big.Little processors combinations that need a cache-coherent GPU connection with lower latency and higher peak throughput.
Ceva builds DSP chip and board for IoT prototyping
IP supplier CEVA has made a development platform intended to speed up the prototyping of IoT and similar devices based on its TeakLite-4 DSP core.
ARM snaps up Carbon model IP for prototyping
ARM has moved back into system-level modelling with the decision to buy the tools and models developed by Carbon Design Systems
Mentor’s Wally Rhines on M&A ‘merger mania’
...and why the semiconductor industry hasn't been singularitied down to one MegaSemis Inc even if that's what M&A data suggests.
Expanding role of UVM takes center stage at DVCon Europe
Tech Design Forum talked to the general and program chairs of DVCon Europe about the conference and how it seeks to show the expansion of IC verification methodologies to the system level.
Software puts deep learning onto embedded DSP
Ceva has launched a software package intended to streamline the porting of convolutional neural network implementations to the XM4 DSP core.
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