How can we refine our approach functional verification to deal with the increasing number of systems that leverage artificial intelligence.
P2P (point-to-point) resistance is fundamental to IC reliability verification. Handle it more efficiently with detailed, automated path layout analysis.
A new clock-domain crossing methodology is described and results provided to show how automation delivers greater efficiency.
How an integrated design environment can help you overcome complexities within the Universal Verification Methodology and manage the size of the libraries within it.
How Siemens PAVE 360 platform leverages emulation to deliver the exhaustive test required for the incoming generation of autonomous vehicles.
A look at some of the key techniques needed to ensue good code coverage during the verification of low-power SoC designs.
A look at ways to improve LVS debug productivity on complex SoCs through more narrowly targeted debug strategies.
The vision of portable stimulus is to find a way to write tests that can be portable ‘vertically’ from IP block to subsystem to system, and ‘horizontally’ from simulation to emulation to silicon. However, applying portable stimulus to real chip designs is not trivial.
Power intent files have increased efficiency and the use of an IDE can prevent them becoming outdated as a design evolves.
Autonomous vehicle functional verification needs to prove the predictable behavior, safety and security of complex SoCs and their associated software, sensors and actuators, demanding greater use of hardware emulation.
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