June 9, 2020
A collaboration between GlobalFoundries and Mentor has resulted in an innovative in-design fixing strategy across markets such as IoT, mobile, RF, graphics and networking.
June 4, 2020
These 13 suggestions toward best practice address some of the most persistent challenges with the Universal Verification Methodology.
June 2, 2020
More commonly associated with SystemVerilog, IDEs can also greatly help users of the popular HDL for FPGA, mil/aero and other designs.
May 29, 2020
Virtualization is becoming ever more common during the Covid-19 outbreak, even for complex technologies like emulation, and showing its strengths.
April 21, 2020
The authors describe an emerging methodology based on a hierarchical data model approach that satisfies the key requirements for RDC verification.
April 14, 2020
Early detection using design integrity checks during implementation from abstract LEF/DEF inputs can deliver major efficiencies.
March 17, 2020
The RF and AMS specialist turned to design software that allowed it to run design checks during place and route.
February 28, 2020
How the use of declarative, constraint-based descriptions can help you focus command sequences on areas of interest.
February 20, 2020
How can we refine our approach functional verification to deal with the increasing number of systems that leverage artificial intelligence.
February 14, 2020
P2P (point-to-point) resistance is fundamental to IC reliability verification. Handle it more efficiently with detailed, automated path layout analysis.
