Expert Insights - EDA

Verification IP can help verify that memory-controller implementations meet standards; test an implementation against specific memories; and drive traffic for SoC verification and power analysis. Here's how to choose it.

A look at what it takes to verify low-power SoC designs, including setting objectives and measuring outcomes in a UPF-driven verification strategy

In-circuit emulation is attractive but brings with it debug-visibility issues. There are ways to restructure the environment to make bug hunting much more deterministic.

The wearables market is booming. Successful development depends on assembling the right software and hardware tools. Here's a primer on what to look for.

A look at some of the quality and safety requirements that must be met when developing and applying semiconductor IP to the automotive sector.

The introduction of bigger FPGAs enables more complex prototypes - but makes debugging more of a challenge. Here's one way to address the issue.

What hardware designers can learn from software verification techniques such as agile, behaviour-driven development, code coverage and zero known defect strategies

Considering design style, assertions, engines and coverage can help ease the development of an effective formal verification test plan

How agile methodologies can be applied to personal and team practice in IC design, including for developing cloud accelerators at Microsoft

Eight issues to consider when choosing an FPGA tool, including risk minimisation, routing issues, ability to iterate, IP freedom and more