In the absence of EUV lithography, the primary option for manufacturing on a 10nm process is to extend double patterning. But the options each have issues.
Lithography is only just beginning to play a role in cell IP selection but early analysis already matters.
You can waive some physical verification errors related to legacy IP found in foundry DRC checks. Knowing which has involved lengthy manual analysis. TSMC is enhancing the process with automation.
DRC+ is a new methodology that algorithmically characterizes design variation through pattern classification. A traditional design rule is used to identify all design structures that share a common configuration. Then, the 2D geometric situations (pattern variations) around the configuration are extracted and classified. Since all such classes share a common configuration, each situation class represents [...]
DFM is essential to differentiating your products in the market, says Luigi Capodieci
Design for manufacturing (DFM) sign-off is a required step in most deep sub-micron technology design environments. However, there is no common methodology for DFM sign-off. We believe DFM should not only give an estimate of the yield, but should also point out where failures are most likely to occur, and where designers can improve their […]