Synopsys

December 14, 2018

The antifuse advantage for one-time programmable non-volatile memory

Antifuse-based OTP NVM is highly scalable, has the area efficiency to enable macros  of megabit capacities, and offers low read power.
Article  |  Topics: Embedded - Architecture & Design, IP - Selection  |  Tags: , ,   |  Organizations:
December 3, 2018
Rahul Chirania is a staff applications engineer with the static verification team at Synopsys.

Verifying clock domain crossings in UPF-based low-power SoCs

The verification challenges of using low-power design techniques to enable advanced power-management strategies in complex SoCs.
Expert Insight  |  Topics: EDA - Verification  |  Tags: , , , ,   |  Organizations:
November 5, 2018
Morten Christiansen is technical marketing manager for Synopsys’ DesignWare USB and DisplayPort IP.

Understanding USB 3.2 and Type-C

The basics of USB 3.2, how to implement it in an SoC, and how USB Type-C connectors and cables are used in USB 3.2 systems.
Expert Insight  |  Topics: Embedded - Architecture & Design, IP - Selection  |  Tags: , ,   |  Organizations:
October 16, 2018
Dana Neustadter is a senior manager of product marketing for Synopsys’ Security IP solutions.

Why AI needs security

As AI becomes pervasive in computing applications, so too does the need for high-grade security in all levels of the system.
Expert Insight  |  Topics: IP - Selection  |  Tags: , ,   |  Organizations:
October 9, 2018

Using threat models and risk assessments to define device security requirements

The proliferation of attacks against embedded systems is making designers realize that they need to do more to secure their products and ecosystems.
Article  |  Topics: Embedded - Architecture & Design, IP - Selection  |  Tags: , , ,   |  Organizations:
October 3, 2018
Allen Watson of Synopsys

An open-source framework for greater flexibility in machine-learning development

Exchange frameworks are emerging to make it easier for neural-network developers to swap between development environments.
Expert Insight  |  Topics: Embedded - Architecture & Design, EDA - ESL  |  Tags: , , ,   |  Organizations: , , , , ,
September 23, 2018
Gordon Cooper

Flexible embedded vision processing architectures for machine-learning applications

Machine-learning strategies for embedded vision are evolving so quickly that designers need access to flexible, heterogenous processor architectures that can adapt as the algorithms evolve.
Expert Insight  |  Topics: Embedded - Architecture & Design, IP - Selection  |  Tags: , ,   |  Organizations:
August 14, 2018
Ashish Darbari is CEO of formal verification consultancy Axiomise.

Doc Formal: Achieving exhaustive formal verification of packet-based designs

Ashish Darbari breaks down formal's value to this challenging verification task with code examples and reference to VC Formal from Synopsys.
August 2, 2018
Visual: cars speeding along a road

Managing the evolving architecture of integrated ADAS controllers

Designers need to understand how the architecture of electronic control units used to implement ADAS in vehicles is changing.
Article  |  Topics: Embedded - Architecture & Design, IP - Design Management, Selection  |  Tags: , ,   |  Organizations: ,
July 11, 2018
Ruud Derwig has more than 20 years of experience with software and system architectures for embedded systems. Key areas of expertise include (real-time, multi-core) operating systems, media processing, component based architectures, and security. He holds a master's degree in computing science and a professional doctorate in engineering. Derwig is currently a software and systems architect at Synopsys.

Picking the right-sized crypto processor for your SoC

Choosing the right crypto processor implementation involves a complex set of design tradeoffs between speed, area, power consumption and flexibility. Using consistent benchmarks can help explore your options.
Expert Insight  |  Topics: IP Topics, IP - Selection  |  Tags: , , , ,   |  Organizations: ,

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