Synopsys

Operating at near-threshold or sub-threshold voltages reduces static and dynamic power consumption, at the cost of design complexity.

Quadrupling the performance of a dedicated CNN engine within an embedded vision processing core brings more complex graph processing within reach.

SoC developers who want to use USB Type-C in their designs will have to implement HDCP 2.2 content protection so that the target devices will be able to play protected content.

How staging virtual prototype bring-up can accelerate the development of embedded software in complex systems.

The increasing complexity of human-machine interfaces is challenging processor designers to produce the necessary performance within a limited power budget

The rising bandwidth demands of data centres have driven the development of 25G Ethernet, which will also form a pathway to 100G.

Unreachability analysis can help find design code that can never be executed, helping verification engineers refine their coverage goals.

How virtual hardware can speed up many aspects of automotive system development, including architectural analysis, software development and verification

Using deep learning techniques and convolutional neural networks to bring facial recognition capabilities to embedded systems.

DVCon China general chair Andy Liu discusses Accellera’s new addition to its design and verification conference series (简体中文).