June 22, 2015
Verifying MIPI interfaces including CSI-2, CPHY, DPHY, MPY, Unipro and the UFS host controller on complex SoCs - should you make or buy the necessary VIP?
May 31, 2015
Complex processes and aggressive synthesis interventions are increasing the risks of metastability, creating a need for netlist-level CDC verification
May 29, 2015
Research study suggests the maturity of your verification flow determines the likelihood of first-pass success far more than the complexity inherent in design size.
May 11, 2015
A look at three techniques to verify the validity of signals moving between clock domains
May 6, 2015
Using equivalence checking to validate ECOs in ARM core subsystem development at STMicroelectronics
May 6, 2015
Designers will have to update development processes to achieve the rigorous safety certifications required in automotive, rail, avionics and similar markets
April 30, 2015
Emulation is now served by all three leading vendors and is a hot topic for discussion among engineers. The major verification conferences need to follow suit.
April 27, 2015
How tool parallelism, automatic partitioning, deep debug memories and time domain multiplexing eases FPGA prototyping of large ASIC and SoC designs
April 20, 2015
How Imagination Technologies used FPGA-based prototyping to develop its GPU IP and integrate it into a real world system
April 3, 2015
Early and accurate SoC power estimation is possible, says Broadcom, thanks to a technique that maps simulation results between gate and RTL representations