Putting emulation on the map

By Lauro Rizzatti |  No Comments  |  Posted: April 30, 2015
Topics/Categories: EDA - ESL, IC Implementation, Verification  |  Tags: , ,  | Organizations: , ,

Dr Lauro Rizzatti is an independent verification consultant. You can contact him at lauro AT rizzatti DOT comDr Lauro Rizzatti is an independent verification consultant. You can contact him at lauro AT rizzatti DOT com

The Design Automation Conference (DAC) program is now available at www.dac.com. It offers something for just about all chip designers and embedded software developers.

I have just one gripe. While functional verification plays a significant role in panels, paper sessions and tutorials, I couldn’t find a standalone session on hardware emulation, the foundation of many verification strategies. Curious since it’s a subject with broad appeal and many applications due in large measure to the ongoing complexities of chip design.

DVCon, the premier verification conference held in early March, had record attendance, according to organizer Accellera Systems Initiative, also because of chip design complexities. What’s curious here as well is that the official discussions on verification again did not include one session on hardware emulation. I attended numerous technical sessions, the keynote, and two panels, all of which were well attended and thought provoking. I came away with several interesting bits of data. But there was little or no mention of hardware emulation.

No matter. The exhibit floor was packed, vibrant and the energy high. All positive signs for a healthy verification sector within EDA in 2015 and a well-attended DAC. However, anyone eavesdropping on the informal exhibit floor conversations during DVCon would have heard plenty of discussions about hardware emulation. There, it was a hot topic there.

Emulation’s rising popularity

Despite being snubbed by DVCon and DAC, emulation’s popularity is a result of numerous factors. These include record-breaking design capacity, increased speed of execution, and improved functionality. Moreover, hardware designers and verification engineers aren’t the only ones using emulation today. Software programmers use it as well to validate embedded projects –– applications, diagnostics, drivers, operating systems and software-driven tests, all with a need to process hundreds of millions – actually let’s make it, billions of cycles. Emulation extends across the entire SoC development cycle.

Now considered among the most versatile and powerful of verification tools, albeit costly, project teams also use emulation for hardware debug, hardware/software co-verification or integration, system-level prototyping, low-power verification and power estimation and performance characterization.

Even more interesting is emulation’s move into the design datacenter. Emulation enterprise servers are increasingly commonplace, enabling a centralized team of emulation experts to support a multitude of users in different continents and time zones. Because they can be accessed remotely, several concurrent users can use them to debug large designs or any combination of large and small designs.

Emulation is unique in its ability to be deployed in several modes, from traditional in-circuit emulation (ICE), and transaction-based acceleration (TBX), to simulation testbench acceleration and embedded software acceleration. Each use case is characterized by the type of stimulus applied to the design under test (DUT) mapped inside the emulator.

The transaction-based mode is what makes hardware emulation a remote resource because it eliminates the need for speed adapters inserted between a slow emulator and a fast target system that require an onsite presence of technical personnel. It also moves verification up a level of abstraction from the register transfer level (RTL), improving performance and debug productivity. When used with Mentor’s VirtuaLAB, for example, emulation takes away the need to create testbenches since it substitutes the physical target system of ICE with a functionally equivalent virtual target system.

Getting emulation within the program

The popularity of hardware emulation is unmistakable and will be a hot product on the DAC exhibit floor and a hot topic in hallway conversations. Remember, all three major vendors now offer emulation products. Likewise, DVCon has expanded into two additional continents. There, I hope it will take more opportunity to tout the benefits of hardware emulation. DVCon India will be held September 10-11 and DVCon Europe is slated for November 11-12.

The DAC program’s live and registration is open for the conference to be held June 7-11 at the Moscone Center in San Francisco. Registration information can be found at www.dac.com.

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