February 25, 2015
Compliance with aviation’s hardware design standard is seen as a ‘tough ask’, but EDA’s own evolution has made that process easier than you may think.
January 30, 2015
How ST Microelectronics uses Synopsys' VCS AMS, combining VCS functional verification and CustomSim, to verify one of its mixed-signal designs
January 20, 2015
Combining assertion-based verification techniques with emulation makes for easier debug, better coverage and greater functional efficiency.
January 13, 2015
Constraints are a vital part of IC design, yet the management and verification of constraints’ quality, completeness, consistency and fidelity to the designer’s intent is an evolving art.
December 8, 2014
CDC violations are now so complex that it takes a combined block and full SoC level verification strategy to catch and fix all the bugs
December 1, 2014
Formal techniques can be applied to various parts of the verification challenge, including low-power and clock domain-crossing issues
November 23, 2014
Emulation and simulation acceleration technologies provide the means to more efficiently detect power issues before tapeout – and find the worst-case modes that need to be fixed.
November 6, 2014
Need to convince your FD of emulation’s growing ROI and the need to invest? Click here and ‘Forward’
November 5, 2014
Fab and IP vendor collaboration is making pattern matching-based libraries a vital component of DRC accuracy and efficiency. Learn how to take advantage.
October 28, 2014
This 'how to' guide shows how to combine the power of emerging and existing technologies for faster, more comprehensive test.